Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Slide 24 Product List
MSP460FR5969 Low Power FRAM MCU Slide 6

The power management system on the FR59 plays a significant role in lowering the overall system power. The PMM uses an intelligent mechanism of power gating which in combination with the predictive LDO ensures that the system is constantly and dynamically adjusting to changing load requirements in a manner that is completely transparent to the end-application. Since the core LDO is buffered by internal capacitors, there is no need for external buffering as in the F5xx family. This not only reduces peak and average power when charging the capacitors but also brings down the total system cost.

PTM Published on: 2014-06-24