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MSP460FR5969 Low Power FRAM MCU Slide 15

The AES accelerator module performs encryption and decryption of 128-bit data with 128, 192, or 256-bit keys according to the advanced encryption standard (AES) (FIPS PUB 197) in hardware. Some key features of this module include the ability to perform 256 bit encryption and decryption in 234 cycles. In comparison, a software algorithm takes a few thousand cycles to accomplish the same. The module also allows DMA usage for autonomous operation and provides an AES ready interrupt flag once encrypted data is available. The AES accelerator module provides automatic clock activation for MCLK for use with low-power modes. When the AES accelerator is busy, it automatically activates MCLK, regardless of the control-bit settings of the clock source. The clock remains active until the AES accelerator completes its operation. The FR5969 device also provides a random number stored as a seed for a deterministic random number generator. This unique seed is programmed at test and is generated on an offline test system using a cryptographic random number generator. This is useful for creating unique serial IDs and also for key generation.

PTM Published on: 2014-06-24